Customer Testimonials

    Helic dominates the Electromagnetic (EM) Extraction Category in the post-DAC 2017 Survey. Helic Exalto gets #7 Best of 2017; Because Inductance counts at 7nm.

    Read detailed responses of DAC 2017 attendees collected independently by a survey firm working with John Cooley.

    Helic dominates the Electromagnetic (EM) Extraction Category in the post-DAC 2017 Survey. Helic Exalto gets #7 Best of 2017; Because Inductance counts at 7nm.

    We think Helic's Exalto is currently the best extractor on the market for analyzing coupling and crosstalk in large scale SoCs. It's RLCK extraction is our preferred method to capture coupling effects and crosstalk on an IC. Traditional RC extractors like Calibre QRC or StarRC are often limited by the size of the netlist. Coupling done with the extra L's (inductive components) and k's (magnetic coupling factors), makes doing StarRC/Calibre QRC top level RLCK extraction impossible. They don't have the capacity.
    Helic's Exalto mitigates this by using a proprietary algorithm to scale down these large-sized netlists; while still maintaining enough accuracy in RLCK extraction.

    Exalto

    Helic Exalto's claim to fame is system level extraction that includes inductive coupling. The idea itself is not new. We had talked about it 10-15 years ago; it was going to be the next new thing, but it never caught on because of the shrinking transistor distance on a planar structure. But then we couldn't pack more planar transistors into a die anymore. Today however, at 7nm we have 3D transistors, and they are faster while the distance between transistors is not decreasing like prior process nodes.
    So inductive coupling is now much more of a factor:

    • The edge rate is faster
    • The transistors are not getting closer

    It matters now -- time to take inductive coupling seriously.

    Exalto

    asy -- Helic Exalto is #1 for us this year.

    Exalto

    Biggest lie? StarRC is going to have RLCK extraction at the speeds that Exalto has now.

    Exalto

    If you are an RF designer, to generate custom electromagnetics devices-- such as inductors and transformers -- to make your circuit better, you need an electromagnetic simulator, preferably one that interfaces with Cadence Analog Artist. We use VeloceRF to synthesize common electromagnetics devices, such as inductors and transformers, with several interesting parameterized cells.

    • We tell VeloceRF what we want, for example inductance and at a certain frequency and a range for silicon area.
    • VeloceRF then extracts 100's or 1000's of possible structures, from which creates a table of 10's of relevant structures, which can be sorted by silicon area or Q, etc.
    • From this table you can pick the structure(s) for which you want a complete model.

    In addition to generating inductors, VeloceRF can synthesize transformers to fit an impedance match condition, or just self and mutual inductance. Again, generating a table of 10's of relevant structures.
    Comparable EM simulation tools that are considerably slower would make generating a table of this size infeasible.

    VeloceRF

    I've been a Helic user for over a decade. Veloce RF allows you to create different passives, such as inductors, transformers, and t/coils. You can synthesize them, and look at the performance across frequency and other conditions. It's extremely fast, so you can do several iterations of the design until you get a perfect design.

    VeloceRF

    The EM simulator at the core of VeloceRF is their RaptorX extraction tool.
    The difference between RaptorX and Ansys HFSS is the speed at which a structure can be simulated. RaptorX can generate a model for arbitrary structures with very high port counts. Which if done right, has the potential to expose issues in the development phase of chip design.

    RaptorX is great for simulating any arbitrary shape:

    • Inductors by themselves
    • Inductors near other inductors
    • Inductors near supply/ or signal lines
    • Even supply and or signal lines by themselves, etc.

    RaptorX is used for post tape-out debugging.

    For example, if you measure an RF coupling issue in the lab, then one will need to go back and debug the physical layout. The ability to include a high number of ports accurately in a EM model will allow you to include more of the suspected metal lines that might have resulted in the coupling witnessed in the lab.

    In general, the more that is modeled, the higher the likelihood of seeing the issue in simulation.

    This makes RaptorX the go to debugging tool.

    RaptorX

    For certain designs, you must use electromagnetic software. RaptorX allows you to take any design you have, and create a high frequency model to see how it performs. In my experience, RaptorX is very user friendly.

    RaptorX

    I've worked with the Helic tools suite and set it up for multiple technologies and metal stacks. Helic's RaptorX is a 3D RLC extractor for high frequency/RF modeling of wires.

    • Normally wires can interfere with your design, but for high-speed designs, you can model it to use them to your advantage.
    • RaptorX helps you understand the relevant factors when you a take a low-speed wire and turn the transformers into inductors
      and capacitors.
    • The tool takes a cross section with wires going through it, and gives a simulatable answer of how it will work.

    RaptorX is an awesome tool for taking small black boxes and simulating them. I'd like them to be able to take it a step further and span between two chips, as that is something we must address as we get into 3D packaging. The problem with doing 3D integration is that chips mounted on substrates are like chips on tops of chips, where one chip is upside down, and must still be extracted and read.

    You end up with multiple sources and want one tool to load it all in. If it's from different fabs, you need secure files from the different sources. e.g. when TSMC delivers an encrypted file of the cross-sectional data to run the tool. I can take the files, compile them into a usable form, and then run the tool, but I can't do it for stacks. TSMC needs to maintain their IP rights but we want to be able to model it. It's more of a legal issue than a mechanical one.

    RaptorX