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Hide Category General Discussions
Forum Name Topics Replies Latest Post Info
Announcements
Announcements
Helic announcements
Moderators: aliap
2 0
Meet us at DesignCon 2010!
Posted: 01-15-2010 09:38 AM
Author: Helic
Feature Requests
Feature Requests
New product feature requests by users
Moderators: akanteres, Padelis, Sotiris
1 1
RLC extractor
Posted: 10-08-2009 07:44 PM
Author: Padelis
Hide Category Product Discussions
Forum Name Topics Replies Latest Post Info
VeloceRF (spiral inductor synthesis, PCells, modeling, verification)
VeloceRF (spiral inductor synthesis, PCells, modeling, verification)
Moderators: Padelis
3 2
really small inductors
Posted: 10-06-2009 02:14 PM
Author: Padelis
VeloceWired (bondwire design and RLCK extraction)
VeloceWired (bondwire design and RLCK extraction)
Moderators: Kostas Nikellis
6 3
Editing symbols created by VeloceWired
Posted: 05-03-2010 12:02 PM
Author: Moisiad
VeloceRaptor/X (rapid RLCK extraction)
VeloceRaptor/X (rapid RLCK extraction)
Moderators: ialam
1 0
Helic new RLCk Net extraction tool
Posted: 10-07-2009 04:25 PM
Author: ialam
Hide Category Community
Forum Name Topics Replies Latest Post Info
RFIC design
RFIC design
Moderators: Sotiris, Padelis
1 0
Compact Modeling with Guaranteed Passivity
Posted: 01-20-2010 12:38 PM
Author: Sotiris
High-speed ASIC design
High-speed ASIC design
Moderators: Moisiad, Y.Katsoulis
0 0
System-in-Package design
System-in-Package design
Moderators: Kostas Nikellis, Moisiad
1 1
LTCC module design flow
Posted: 07-03-2010 09:01 AM
Author: viswa
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