<?xml version="1.0" encoding="utf-8" ?>
<rss version="2.0"
    xmlns:dc="http://purl.org/dc/elements/1.1/"
    xmlns:sy="http://purl.org/rss/1.0/modules/syndication/"
    xmlns:admin="http://webns.net/mvcb/"
    xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
    xmlns:content="http://purl.org/rss/1.0/modules/content/">
    
    <channel>
    
    <title>Helic.com Forum</title>
    <link>http://www.helic.com/forum/</link>
    <description>Helic.com Forum</description>
    <dc:language>en</dc:language>
    <dc:rights>Copyright 2009</dc:rights>
    <dc:date>2009-10-07T16:25:19+02:00</dc:date>
    <admin:generatorAgent rdf:resource="http://expressionengine.com/" />
    

    <item>
      <title>Helic new RLCk Net extraction tool</title>
      <link>http://www.helic.com/forum/viewthread/55/</link>
      <guid>http://www.helic.com/forum/viewthread/55/#When:16:25:19Z</guid>
      <description>&lt;p&gt;VeloceRaptor/X is a breakthrough RLCK extraction tool with unparalleled capacity and speed in the modeling of integrated passives such as transmission lines, interconnects, digital high&#45;speed lines, spiral inductors and metal&#45;insulator&#45;metal (MIM) capacitors.The tool is powered by Helic’s renowned vector&#45;based inductance modeling engine (VeloceRaptor™) which guarantees rapid EM model generation with no compromises in accuracy. As a layout extraction tool, VeloceRaptor/X contends and outperforms conventional EM simulators in terms of speed vs. accuracy. VeloceRaptor/X can be combined with Helic’s VeloceRF™ toolset to provide – for the first time – a complete solution for spiral inductor synthesis and wholechip modeling of RFICs and Systems&#45;in&#45;Package.
&lt;/p&gt;</description>
      <dc:date>2009-10-07T16:25:19+02:00</dc:date>
    </item>

    
    </channel>
</rss>
