Press Releases

9 June 2008
Helic launches VeloceWired™ for bondwire design in the IC flow
 
4 June 2007
ClariPhy leverages Helic's VeloceRF™ EDA tool for first-pass success of CMOS 10G mixed-signal IC
 
4 June 2007
Helic's VeloceRF™ is selected by Fujitsu to build RFIC design flows for sub-100nm CMOS processes.
 
20 July 2006
New release of VeloceRF™ supports 90-nm & 65-nm RFIC design
 
17 July 2006
AWR® and Helic® Partner to Offer VeloceRF™ Technology in Analog Office® Software
 
16 November 2005
Helic® and EdXact collaborate to boost RFIC design
 
8 June 2005
Micro Linear selects Helic's VeloceRF™ for RFIC inductor synthesis modeling and verification
 
13 December 2004
Helic introduces unique new features in the VeloceRF™ toolset
 
27 May 2004
Helic and Cadence Collaborate to Deliver RF Design Solution
 

Press Coverage

6 June 2008
EETimes - Helic launches tool for bondwire design

17 July 2006
EETimes - AWR to integrate, sell Helic EDA software

24 June 2004
Microwave Journal - Helic and Cadence join forces to deliver RF Design Solution

27 May 2004
Electronic News - Cadence and Helic Team for RF Design

22 December 2003
EETimes - Inductance-modeling tool aims to ease RF design

8 December 2003
EETimes - Passive integration activates wireless

News Archives