Helic Inc., the technology leader in EDA solutions for RF and high-speed IC design, with the cooperation of Patras Science Park, is organizing a conference with the following subject: “Presentation of HELIC and career opportunities for young scientists”.
The conference will be held on Friday, July 8th, 2011, from 10.30 to 14.00 in the first floor conference hall of the Patras Science Park (Stadiou Str., Platani, 26504, Patras). Professors Constantine Goutis of the Electrical and Computer Engineering Department and George Alexiou of the Computer Engineering and Informatics Department, of University of Patras will give presentations.
The conference is open to undergraduate and postgraduate students, and to young scientists (free entrance). A reception will follow in the second floor foyer of the Patras Science Park.
Confirm your participation via LinkedIn or Facebook.
For Helic Inc. conference schedule, please follow this link.
Directions to the Patras Science Park, can be found here.
IRVINE, Calif., and ATHENS, Greece, June 4, 2007 - ClariPhy Communications and Helic S.A. today announced details of their joint engineering collaboration over the past 12 months, which has been instrumental in the first-pass success of ClariPhy's single-chip, 10GBASE-LRM, mixed-signal CMOS transceiver. ClariPhy's transceiver features a low-power 10G Analog to Digital Converter (ADC) and a Maximum Likelihood Sequence Detection (MLSD) Electronic Dispersion Compensation (EDC) engine.
ATHENS, GREECE, June 4, 2007 - Helic S.A. proudly announces that Fujitsu Limited has adopted VeloceRF™ and Helic's technology to build a new design-flow for RFICs in its 90nm and 65nm CMOS processes. The parties have agreed to develop world-class tooling and design methodology to support rapid prototyping and volume production of high-frequency ICs applying advanced lithography techniques.
ATHENS, GREECE - Helic S.A. announces today the commercial availability of VeloceRF™ v1.5, featuring an enhanced Spiral Wizard™ inductor synthesizer, several improvements in its rapid RLCK modeling engine and new features addressing Design for Manufacturability (DFM) for 90-nm and 65-nm RFICs.
EL SEGUNDO, Calif. and ATHENS, Greece - July 17, 2006 - Applied Wave Research, Inc. (AWR®) and Helic S.A. (Helic®) today announced a technology licensing agreement that enables the integration of Helic's VeloceRF™ whole-chip radio frequency (RF) extraction, modeling, and verification technology into AWR's Analog Office® RF integrated circuit (IC) design suite. The companies also announced a marketing agreement enabling AWR to market the solution through its worldwide distribution channels.
ATHENS, Greece - GRENOBLE, France, November 16, 2005 - Helic S.A. and EdXact S.A. leading European EDA companies in modeling and verification, announce today a joint development that will result in an extension of Helic's VeloceRF™ inductance modeling, verification and synthesis tool. The new offering, called VRFJ™, will be based on EdXact's Jivaro™ netlist reduction technology.
ATHENS, GREECE, June 8, 2005 – Helic S.A. proudly announces that another semiconductor company has selected its VeloceRF EDA product. Micro Linear Corporation (Nasdaq: MLIN), a leading digital wireless transceiver U.S. company, will be using VeloceRF for synthesis, modeling and verification of integrated inductors in its RFIC designs.
The Spiral Wizard™ module within VeloceRF v1.4.2 can rapidly and efficiently deliver spirals "to-order", tailored exactly to the designer's requirements in inductance, operating frequency and quality factor. The design process is significantly simplified and accelerated, as it is disentangled from the use of pre-characterized inductor libraries. The Spiral Wizard features on-the-fly layout synthesis, under an extensive set of constraints that make it possible to optimize inductor quality factor, shrink silicon real estate and minimize surrounding interconnect. Available within both schematic and layout environments, the interface is highly intuitive and extremely fast - even for complex spiral types such as differential and transformer, the Spiral Wizard will generate a solution in a few seconds.
ATHENS, GREECE - Helic S.A. announces a multi-faceted IP and EDA tools collaboration with Cadence Design Systems, Inc. in which both companies aim to become the springboard for the design of next-generation wireless semiconductor products. As part of the agreement, VeloceRF™, Helic's recently introduced tool for the rapid modeling and synthesis of on-chip and in-package inductances, becomes a third-party extension to the Virtuoso® custom design platform. Furthermore, Cadence licenses Helic's PolyRadio™ RFIP that will serve as a Wi-Fi reference design in the Virtuoso® platform, comprising RF silicon blocks such as a low-noise amplifier (LNA), fully-integrated power amplifier and voltage-controlled oscillator (VCO), linear direct-conversion mixers and programmable analog baseband circuitry. Helic's RFIP has already been fabricated and validated on a series of leading SiGe BiCMOS foundry processes.
