SAN FRANCISCO, CA June 10, 2010 — Helic Inc., the technology leader in inductor synthesis and extraction solutions for RF and high-speed IC design, today announced that TSMC 65nm RF Reference Design Kit 2.0 uses its VeloceRF™ toolset for spiral inductor synthesis, modeling and EM parasitics annotation.
TSMC and Helic have collaborated on the RF Reference Design Kit (RDK) 2.0 based on a real-world voltage-controlled oscillator (VCO) design. The RF RDK 2.0 now supports spiral inductor synthesis and optimization, LVS with spiral components, interconnect RLCK parasitics extraction and annotation, which leverage capabilities of the VeloceRF™ toolset. It allows designers of RF and high-speed custom ICs to jump-start advanced 65-nanometer design and achieve faster turnaround times, higher performance and less manufacturing risk.
As part of the RF RDK 2.0 package, Helic and TSMC provide a VCO design tutorial and test case, covering inductor synthesis, modeling, RLCK parasitics annotation and design optimization. Customers can download the RF RDK 2.0 from TSMC-Online and follow a detailed step-by-step flow using an actual design.
To meet the demands of RF and high-speed design in TSMC’s advanced nanoscale processes, VeloceRF™ features a PCell synthesis engine that generates custom inductor layouts with DRC and DFM consideration according to designer specifications. Moreover, VeloceRF™ brings a complete solution for achieving an optimal floorplan, enabling silicon area reduction by optimizing inductor sizes and device clearance. VeloceRF™ assists in de-risking the design from electromagnetic effects, by allowing the incorporation of mutual inductance and EM coupling parasitics in post-layout simulation.
“Helic’s VeloceRF™ provided a complete solution that met TSMC EM Tool requirements”, said Tom Quan, deputy director of design methodology and service marketin at TSMC. “Helic offers the advanced custom spiral inductor synthesis capabilities that extend the TSMC PDK with more PCell options, liberating designers from the labor-intensive tasks of custom inductor simulation and layout. Inductor model accuracy and simulation results correlated well with TSMC data for a reference VCO circuit. In the RF RDK 2.0, VeloceRF™ works interoperably with other tools, enhancing verification support with RLCK parasitics annotation. ”
“We are very excited to participate in TSMC’s 65nm RF RDK 2.0”, said Sotiris Bantas, Helic Vice President of Technology. Customers who use the RF RDK 2.0 will experience the unparalleled flexibility and speed of VeloceRF™ in synthesizing and modeling spiral inductors in TSMC’s advanced nanoscale technology. RF RDK 2.0 provides an excellent step-by-step guide for designers with varying degrees of expertise, to quickly and reliably design VCOs and get them right the first time. VeloceRF™ brings good capabilities that work in harmony with TSMC’s top quality PDK, to assist designers in optimizing and de-risking their RF circuits.”
Helic, Inc. develops disruptive EDA technology for RFIC and System-in-Package design. We provide our customers with a service model combining EDA tools, IP and services, enabling first-pass silicon while greatly reducing the development cycles of integrated wireless transceiver products. VeloceRF™ is our leading EDA tool for integrated inductor synthesis, modeling, and verification. Helic’s products have been adopted by many renowned semiconductor companies worldwide, with over 500 designers using our tools.
Helic is headquartered at 101 Montgomery Street, suite 1950, San Francisco, CA 94104.
