Articles

  • Parametric Analysis and Design Guidelines for mm-Wave Transmission Lines in nm CMOS

    This paper focuses on nm CMOS transmission line design as distributed passive elements and their application in mm-wave integrated circuits. A variety of transmission lines such as coplanar waveguides (CPWs), shielded coplanar waveguides (SCPWs), and CPW with ground are analyzed in terms of their geometry and electrical properties. The parametric analysis of the various line […]

  • New Shifts In Automotive Design

    Four big shifts in automotive design and usage are beginning to converge—electrification, increasing connectivity, autonomous driving and car sharing—creating a ripple effect across the automotive electronics supply chain. Over the past few years the electronic content of cars and other vehicles has surged, with electrical systems replacing traditional mechanical and electro-mechanical subsystems. That has been […]

  • High-Performance Memory Challenges

    Designing memories for high-performance applications is becoming far more complex at 7/5nm. There are more factors to consider, more bottlenecks to contend with, and more tradeoffs required to solve them. One of the biggest challenges is the sheer volume of data that needs to be processed for AI, machine learning or deep learning, or even […]

  • The Trouble With Models

    Models are becoming more difficult to develop, integrate and utilize effectively at 10/7nm and beyond as design complexity, process variation and physical effects add to the number of variables that need to be taken into account. Modeling is a way of abstracting the complexity in various parts of the semiconductor design, and there can be […]

  • Predictions: Manufacturing, Devices And Companies

    Some predictions are just wishful thinking, but most of these are a lot more thoughtful. They project what needs to happen for various markets or products to become successful. Those far reaching predictions may not fully happen within 2018, but we give everyone the chance to note the progress made towards their predictions at the […]

  • Turning Down The Power

    Chip and system designers are giving greater weight to power issues these days. But will they inevitably hit a wall in accounting for ultra-low-power considerations? Performance, power, and area are the traditional attributes in chip design. Area was originally the main priority, with feature sizes constantly shrinking according to Moore’s Law. Performance was in the […]

  • Lots Of Little Knobs For Power

    Dynamic power is becoming a much bigger worry at new nodes as more finFETs are packed on a die and wires shrink to the point where resistance and capacitance become first-order effects. Chipmakers began seeing dynamic power density issues with the first generation of finFETs. While the 3D transistor structures reduced leakage current by providing […]

  • Noise Abatement

    Noise is a fact of life. Almost everything we do creates noise as a by-product and quite often what is a signal to one party is noise to another. Noise cannot be eliminated. It must be managed. But is noise becoming a larger issue in chips as the technology nodes get smaller and packaging becomes […]

  • New Power Concerns At 10/7nm

    As chip sizes and complexity continues to grow exponentially at 7nm and below, managing power is becoming much more difficult. There are a number of factors that come into play at advanced nodes, including more and different types of processors, more chip-package decisions, and more susceptibility to noise of all sorts due to thinner insulation […]

  • Multi-Physics Combats Commoditization

    The semiconductor industry has benefited greatly from developments around digital circuitry. Circuits have grown in size from a few logic gates in the 1980s to well over 1 billion today. In comparison, analog circuits have increased in size by a factor of 10. The primary reason is that digital logic managed to isolate many of […]