Inductance-aware RFIC and system-in-package design

Product Brochure

Frequently Asked Questions

VeloceRF is based on more than a decade of research on rapid electromagnetic modeling algorithms, adapted to modern silicon technologies.

Featuring a seamlessly-integrated design flow, VeloceRF enables you to rapidly synthesize spiral inductors, model interconnect parasitics, verify RF IC's with mutual inductance effects - all with great ease of use and without wait.

VeloceRF is used by semiconductor companies wordlwide enabling first-pass success in the design of demanding circuits for high-frequency applications such as WCDMA, PHS, WLAN, UWB and multi-Gigabit Ethernet.

Product Features

			Rapid modeling of arbitrarily-shaped spiral inductors and RF interconnects.
			DRC- and DFM-aware synthesis of square, octagonal, polygonal and differential inductors and transformers.
			Very accurate inductance and quality factor prediction, tested on more than 10 silicon processes!
			Seamless interface to the Cadence Virtuoso custom IC platform. Fully compatible with OpenAccess&trade and Cadence IC 6.1.
			Seamless mutual inductance extraction and backannotation in layout and schematics views.
			RLCK netlist output, compatible with all SPICE simulators.
			Netlist reduction and fixed-element compact model capabilities.
			Modeling of on-chip temperature gradients.
			No parameter fitting against measurement required.
			Applicable to system-in-package on LTCC and other substrates.
			Applicable to RF MEMS and SOI.

Product Benefits

			Enables whole-chip RF EM simulation closing the gap in the RFIC design flow.
			Massively accelerates simulation against conventional EM tools.
			Enables RF IP portability and re-use.
			Ensures first-pass silicon and slashes development cycles
			Can reduce RFIC die area and cost by 30% or more.

For sales inquiries please contact us.

For the next VeloceRF-related event click here.